Latin American applied research
versión impresa ISSN 0327-0793
The application of a random sampling scheme in high-frequency digital lock-in amplifiers is proposed. This scheme allows reducing the sampling frequency with reduced aliasing effects. Analytical and numerical analyses that show the advantages and limitations of the proposed scheme are presented. Furthermore, experimental tests that validate the proposal are given. The maximum input-signal frequency of a lock-in amplifier working with the proposed sampling scheme is not limited by the sampling frequency. Instead, the limit is imposed by the quantization of the random time periods and the sample-and-hold device.
Palabras llave : Lock-In Amplifier; Random Sampling; Digital Signal Processing.