SciELO - Scientific Electronic Library Online

 
vol.37 número1An open-source tool for SystemC to Verilog automatic translationFunctional verification: approaches and challenges índice de autoresíndice de materiabúsqueda de artículos
Home Pagelista alfabética de revistas  

Servicios Personalizados

Revista

Articulo

Indicadores

  • No hay articulos citadosCitado por SciELO

Links relacionados

  • No hay articulos similaresSimilares en SciELO

Compartir


Latin American applied research

versión impresa ISSN 0327-0793

Resumen

DE ALBA, M. et al. FPGA design of an efficient and low-cost smart phone interrupt controller. Lat. Am. appl. res. [online]. 2007, vol.37, n.1, pp.59-63. ISSN 0327-0793.

In this work we have designed and implemented an efficient platform-level interrupt controller for a PXA270 microprocessor-based smart phone. Although current hardware development boards include this type of controllers, for specific applications most of them are costly and include too many interrupt sources that represent a waste for a particular design. For this reason we designed our own interrupt controller which is capable of detecting interrupt sources coming from different devices that request microprocessor service. The developed interrupt controller is efficient and low-cost due to the small number of register and logic gates required for its implementation, as well as for the small number of levels to be traversed in the circuit's critical execution path.

Palabras clave : Interrupt Controller; Codesign; FPGA; Low-Cost; Effective; PXA270; Smart Phone.

        · texto en Inglés     · Inglés ( pdf )

 

Creative Commons License Todo el contenido de esta revista, excepto dónde está identificado, está bajo una Licencia Creative Commons