SciELO - Scientific Electronic Library Online

 
vol.37 número1A portable hardware design of a FFT algorithmComparison of FPGA implementation of the mod M reduction índice de autoresíndice de materiabúsqueda de artículos
Home Pagelista alfabética de revistas  

Servicios Personalizados

Revista

Articulo

Indicadores

  • No hay articulos citadosCitado por SciELO

Links relacionados

  • No hay articulos similaresSimilares en SciELO

Compartir


Latin American applied research

versión impresa ISSN 0327-0793

Resumen

LLAMOCCA-OBREGON, D. R.  y  AGURTO-RIOS, C. P.. A fixed-point implementation of the expanded hyperbolic CORDIC algorithm. Lat. Am. appl. res. [online]. 2007, vol.37, n.1, pp.83-91. ISSN 0327-0793.

The original hyperbolic CORDIC (Coordinate Rotation Digital Computer) algorithm (Walther, 1971) imposes a limitation to the inputs' domain which renders the algorithm useless for certain applications in which a greater range of the function is needed. To address this problem, Hu et al. (1991) have proposed an interesting scheme which increments the iterations of the original hyperbolic CORDIC algorithm and allows an efficient mapping of the algorithm onto hardware. A fixed-point implementation of the hyperbolic CORDIC algorithm with the expansion scheme proposed by Hu et al. (1991) is presented. Three architectures are proposed: a low cost iterative version, a fully pipelined version, and a bit serial iterative version. The architectures were described in VHDL, and to test the architecture, it was targeted to a Stratix FPGA. Various standard numerical formats for the inputs are analyzed for each hyperbolic function directly obtained: Sinh, Cosh, Tanh-1 and exp. For each numerical format and for each hyperbolic function an error analysis is performed.

        · texto en Inglés     · Inglés ( pdf )

 

Creative Commons License Todo el contenido de esta revista, excepto dónde está identificado, está bajo una Licencia Creative Commons