Special Issue on Programmable Logic

II Southern Conference on Programmable Logic (SPL2006) held in Mar del Plata, Argentina, March 8-10, 2006.

Preface

Field programmable logic devices have traditionally been used as vehicles for prototyping and implementing digital circuits. But beyond this use, continued improvements in device density and functionality have made the technology a mainstream one for implementing large systems and accelerators for specific applications.

Field Programmable Gate Arrays (FPGA) is one of the most well known commercial names of Programmable Logic. The FPGA technology, marketed in 1984 by a start-up company called Xilinx^TM, allowed designers to build complex circuits with virtually zero setup costs, enabling the development of the small-scale products common to most Latin American technological companies.

Nowadays, after more than two decades of progress, programmable logic has become the key technology in Digital Systems Design. Not only FPGAs are now capable of implementing multimillion gate systems working at hundreds of Megahertz, but also the design costs of custom ASICs have soared to levels where only million-unit projects are profitable, keeping them out of the reach of most companies.

Applications of FPGAs includes almost every application that needs a fast electronic system including DSP (digital signal processing) applications, ASIC prototyping, medical imaging, computer vision, speech recognition, cryptography, bioinformatics, aerospace and defence systems, computer hardware emulation and a growing range of other areas.

FPGAs market and applications growing is reflected also in the variety of programmable logic conferences around the world and the number of papers published by the research community.

The SPL (Southern Conference on Programmable Logic, www.splconf.org) is the austral meeting point for research on FPGA technology. It started in 2005 as a cooperation project between Spain and Latin America called SURLABS. The project "SURLABs: Joint Latin American FPGA Laboratories" was financed by the Banco Santander Central Hispano, under the action "Proyectos de Investigación UAM-SCH para la Cooperación con América Latina". The main objectives of SURLABs were to create a network of laboratories interested in Digital Systems Design, and to introduce FPGAs in industries and undergraduate / PhD university programs.

Original partners were the Universidad Autónoma de Madrid, the Universidad Nacional de Mar del Plata, the Universidad de Lima, the Universidad Nacional de Salta, the Universidad Nacional del Centro at Tandil, the Universidad CAECE at Mar del Plata, and the Instituto Tecnológico de Monterrey, México. Soon, other dynamic organizations started valuable activities in relation with the project. In particular, FPGA seminars were held at the Instituto Nacional de Tecnología Industrial (INTI), the Universidad Nacional de Entre Ríos at Concordia, and the Universidad Tecnológica Nacional at Bahía Blanca.

In 2006, the project was also sponsored by the Agencia Nacional de Promoción Científica y Tecnológica from Argentina, Altera Corporation, Hewlett-Packard Company and Xilinx Inc. from USA.

Starting in March 2005, the first SURLABs course received the registration of more than 60 people from Argentina, Brazil Costa Rica, and Peru. This 5-day workshop introduced students, professors and engineers to the state of art of the technology. Additionally, in the unique atmosphere of the one-hundred year old CAECE University building, several research works were presented in a plenary session that set up the first SPL, the Southern Conference of Programmable Logic.

In 2006, more than 80 engineers applied to the II SURLAB course. Meanwhile, more than 50 papers were submitted to the II SPL Conference. The 45 selected papers presented at the II SPL were authored by researchers from Argentina, Brazil, Costa Rica, México, Spain, Peru, United Kingdom, USA, and Uruguay. These high technical quality works cover aspects of FPGA-based system design like Custom DSPs, Computer Arithmetic, Cryptography, Control Systems, Instrumentation, Video Processing, Embedded Processors, Test, Fault Tolerance, Low Power Design, High-Level Languages, and Education. More than 80 researchers attended this conference.

The interest and rapid growing of the conference has received the IEEE Circuit and Systems Society (CAS) technical co-sponsorship for SPL 2007.

This special issue presents a selection of articles from the SPL2006 (II Southern Conference on Programmable Logic) held in Mar del Plata, Argentina during March 8-10, 2006. Fifty relevant researchers helped us in the review process to select 16 contributions covering topics of Stereo vision, Video compression, Cryptographic algorithm, Embedded Real-Time processor, Robotics applications, Signal processing, High level language description, Functional verification and Low Power issues in FPGAs. An invited paper on the emerging topic of Cryptographic Applications in FPGA has been included.

The editors of this special issue on programmable logic hope that this edition constitutes a wide scope vision of FPGA Design, valuable for Electronic Engineers and Designers.

Gustavo Sutter,
Hilda Ángela Larrondo,
José Luis Figueroa
(editors)